MPU6050.h
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1 // Based on InvenSense MPU-6050 register map document rev. 2.0, 5/19/2011
2 // (RM-MPU-6000A-00)
3 // Based On https://github.com/jrowberg/i2cdevlib
4 
5 // NOTE: THIS IS ONLY A PARTIAL RELEASE. THIS DEVICE CLASS IS CURRENTLY
6 // UNDERGOING ACTIVE DEVELOPMENT AND IS STILL MISSING SOME IMPORTANT FEATURES.
7 // PLEASE KEEP THIS IN MIND IF YOU DECIDE TO USE THIS PARTICULAR CODE FOR
8 // ANYTHING.
9 
10 /* ============================================
11  I2Cdev device library code is placed under the MIT license
12  Copyright (c) 2012 Jeff Rowberg
13 
14  Permission is hereby granted, free of charge, to any person obtaining a copy
15  of this software and associated documentation files (the "Software"), to deal
16  in the Software without restriction, including without limitation the rights
17  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
18  copies of the Software, and to permit persons to whom the Software is
19  furnished to do so, subject to the following conditions:
20 
21  The above copyright notice and this permission notice shall be included in
22  all copies or substantial portions of the Software.
23 
24  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
27  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
28  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
29  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30  THE SOFTWARE.
31  ===============================================
32  */
33 
34 #pragma once
35 
36 #include <Libraries/I2Cdev/I2Cdev.h>
37 
38 #define MPU6050_ADDRESS_AD0_LOW 0x68 // address pin low (GND), default for InvenSense evaluation board
39 #define MPU6050_ADDRESS_AD0_HIGH 0x69 // address pin high (VCC)
40 #define MPU6050_DEFAULT_ADDRESS MPU6050_ADDRESS_AD0_LOW
41 
42 #define MPU6050_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
43 #define MPU6050_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
44 #define MPU6050_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
45 #define MPU6050_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN
46 #define MPU6050_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN
47 #define MPU6050_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN
48 #define MPU6050_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
49 #define MPU6050_RA_XA_OFFS_L_TC 0x07
50 #define MPU6050_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS
51 #define MPU6050_RA_YA_OFFS_L_TC 0x09
52 #define MPU6050_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS
53 #define MPU6050_RA_ZA_OFFS_L_TC 0x0B
54 #define MPU6050_RA_SELF_TEST_X 0x0D //[7:5] XA_TEST[4-2], [4:0] XG_TEST[4-0]
55 #define MPU6050_RA_SELF_TEST_Y 0x0E //[7:5] YA_TEST[4-2], [4:0] YG_TEST[4-0]
56 #define MPU6050_RA_SELF_TEST_Z 0x0F //[7:5] ZA_TEST[4-2], [4:0] ZG_TEST[4-0]
57 #define MPU6050_RA_SELF_TEST_A 0x10 //[5:4] XA_TEST[1-0], [3:2] YA_TEST[1-0], [1:0] ZA_TEST[1-0]
58 #define MPU6050_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR
59 #define MPU6050_RA_XG_OFFS_USRL 0x14
60 #define MPU6050_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR
61 #define MPU6050_RA_YG_OFFS_USRL 0x16
62 #define MPU6050_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR
63 #define MPU6050_RA_ZG_OFFS_USRL 0x18
64 #define MPU6050_RA_SMPLRT_DIV 0x19
65 #define MPU6050_RA_CONFIG 0x1A
66 #define MPU6050_RA_GYRO_CONFIG 0x1B
67 #define MPU6050_RA_ACCEL_CONFIG 0x1C
68 #define MPU6050_RA_FF_THR 0x1D
69 #define MPU6050_RA_FF_DUR 0x1E
70 #define MPU6050_RA_MOT_THR 0x1F
71 #define MPU6050_RA_MOT_DUR 0x20
72 #define MPU6050_RA_ZRMOT_THR 0x21
73 #define MPU6050_RA_ZRMOT_DUR 0x22
74 #define MPU6050_RA_FIFO_EN 0x23
75 #define MPU6050_RA_I2C_MST_CTRL 0x24
76 #define MPU6050_RA_I2C_SLV0_ADDR 0x25
77 #define MPU6050_RA_I2C_SLV0_REG 0x26
78 #define MPU6050_RA_I2C_SLV0_CTRL 0x27
79 #define MPU6050_RA_I2C_SLV1_ADDR 0x28
80 #define MPU6050_RA_I2C_SLV1_REG 0x29
81 #define MPU6050_RA_I2C_SLV1_CTRL 0x2A
82 #define MPU6050_RA_I2C_SLV2_ADDR 0x2B
83 #define MPU6050_RA_I2C_SLV2_REG 0x2C
84 #define MPU6050_RA_I2C_SLV2_CTRL 0x2D
85 #define MPU6050_RA_I2C_SLV3_ADDR 0x2E
86 #define MPU6050_RA_I2C_SLV3_REG 0x2F
87 #define MPU6050_RA_I2C_SLV3_CTRL 0x30
88 #define MPU6050_RA_I2C_SLV4_ADDR 0x31
89 #define MPU6050_RA_I2C_SLV4_REG 0x32
90 #define MPU6050_RA_I2C_SLV4_DO 0x33
91 #define MPU6050_RA_I2C_SLV4_CTRL 0x34
92 #define MPU6050_RA_I2C_SLV4_DI 0x35
93 #define MPU6050_RA_I2C_MST_STATUS 0x36
94 #define MPU6050_RA_INT_PIN_CFG 0x37
95 #define MPU6050_RA_INT_ENABLE 0x38
96 #define MPU6050_RA_DMP_INT_STATUS 0x39
97 #define MPU6050_RA_INT_STATUS 0x3A
98 #define MPU6050_RA_ACCEL_XOUT_H 0x3B
99 #define MPU6050_RA_ACCEL_XOUT_L 0x3C
100 #define MPU6050_RA_ACCEL_YOUT_H 0x3D
101 #define MPU6050_RA_ACCEL_YOUT_L 0x3E
102 #define MPU6050_RA_ACCEL_ZOUT_H 0x3F
103 #define MPU6050_RA_ACCEL_ZOUT_L 0x40
104 #define MPU6050_RA_TEMP_OUT_H 0x41
105 #define MPU6050_RA_TEMP_OUT_L 0x42
106 #define MPU6050_RA_GYRO_XOUT_H 0x43
107 #define MPU6050_RA_GYRO_XOUT_L 0x44
108 #define MPU6050_RA_GYRO_YOUT_H 0x45
109 #define MPU6050_RA_GYRO_YOUT_L 0x46
110 #define MPU6050_RA_GYRO_ZOUT_H 0x47
111 #define MPU6050_RA_GYRO_ZOUT_L 0x48
112 #define MPU6050_RA_EXT_SENS_DATA_00 0x49
113 #define MPU6050_RA_EXT_SENS_DATA_01 0x4A
114 #define MPU6050_RA_EXT_SENS_DATA_02 0x4B
115 #define MPU6050_RA_EXT_SENS_DATA_03 0x4C
116 #define MPU6050_RA_EXT_SENS_DATA_04 0x4D
117 #define MPU6050_RA_EXT_SENS_DATA_05 0x4E
118 #define MPU6050_RA_EXT_SENS_DATA_06 0x4F
119 #define MPU6050_RA_EXT_SENS_DATA_07 0x50
120 #define MPU6050_RA_EXT_SENS_DATA_08 0x51
121 #define MPU6050_RA_EXT_SENS_DATA_09 0x52
122 #define MPU6050_RA_EXT_SENS_DATA_10 0x53
123 #define MPU6050_RA_EXT_SENS_DATA_11 0x54
124 #define MPU6050_RA_EXT_SENS_DATA_12 0x55
125 #define MPU6050_RA_EXT_SENS_DATA_13 0x56
126 #define MPU6050_RA_EXT_SENS_DATA_14 0x57
127 #define MPU6050_RA_EXT_SENS_DATA_15 0x58
128 #define MPU6050_RA_EXT_SENS_DATA_16 0x59
129 #define MPU6050_RA_EXT_SENS_DATA_17 0x5A
130 #define MPU6050_RA_EXT_SENS_DATA_18 0x5B
131 #define MPU6050_RA_EXT_SENS_DATA_19 0x5C
132 #define MPU6050_RA_EXT_SENS_DATA_20 0x5D
133 #define MPU6050_RA_EXT_SENS_DATA_21 0x5E
134 #define MPU6050_RA_EXT_SENS_DATA_22 0x5F
135 #define MPU6050_RA_EXT_SENS_DATA_23 0x60
136 #define MPU6050_RA_MOT_DETECT_STATUS 0x61
137 #define MPU6050_RA_I2C_SLV0_DO 0x63
138 #define MPU6050_RA_I2C_SLV1_DO 0x64
139 #define MPU6050_RA_I2C_SLV2_DO 0x65
140 #define MPU6050_RA_I2C_SLV3_DO 0x66
141 #define MPU6050_RA_I2C_MST_DELAY_CTRL 0x67
142 #define MPU6050_RA_SIGNAL_PATH_RESET 0x68
143 #define MPU6050_RA_MOT_DETECT_CTRL 0x69
144 #define MPU6050_RA_USER_CTRL 0x6A
145 #define MPU6050_RA_PWR_MGMT_1 0x6B
146 #define MPU6050_RA_PWR_MGMT_2 0x6C
147 #define MPU6050_RA_BANK_SEL 0x6D
148 #define MPU6050_RA_MEM_START_ADDR 0x6E
149 #define MPU6050_RA_MEM_R_W 0x6F
150 #define MPU6050_RA_DMP_CFG_1 0x70
151 #define MPU6050_RA_DMP_CFG_2 0x71
152 #define MPU6050_RA_FIFO_COUNTH 0x72
153 #define MPU6050_RA_FIFO_COUNTL 0x73
154 #define MPU6050_RA_FIFO_R_W 0x74
155 #define MPU6050_RA_WHO_AM_I 0x75
156 
157 #define MPU6050_SELF_TEST_XA_1_BIT 0x07
158 #define MPU6050_SELF_TEST_XA_1_LENGTH 0x03
159 #define MPU6050_SELF_TEST_XA_2_BIT 0x05
160 #define MPU6050_SELF_TEST_XA_2_LENGTH 0x02
161 #define MPU6050_SELF_TEST_YA_1_BIT 0x07
162 #define MPU6050_SELF_TEST_YA_1_LENGTH 0x03
163 #define MPU6050_SELF_TEST_YA_2_BIT 0x03
164 #define MPU6050_SELF_TEST_YA_2_LENGTH 0x02
165 #define MPU6050_SELF_TEST_ZA_1_BIT 0x07
166 #define MPU6050_SELF_TEST_ZA_1_LENGTH 0x03
167 #define MPU6050_SELF_TEST_ZA_2_BIT 0x01
168 #define MPU6050_SELF_TEST_ZA_2_LENGTH 0x02
169 
170 #define MPU6050_SELF_TEST_XG_1_BIT 0x04
171 #define MPU6050_SELF_TEST_XG_1_LENGTH 0x05
172 #define MPU6050_SELF_TEST_YG_1_BIT 0x04
173 #define MPU6050_SELF_TEST_YG_1_LENGTH 0x05
174 #define MPU6050_SELF_TEST_ZG_1_BIT 0x04
175 #define MPU6050_SELF_TEST_ZG_1_LENGTH 0x05
176 
177 #define MPU6050_TC_PWR_MODE_BIT 7
178 #define MPU6050_TC_OFFSET_BIT 6
179 #define MPU6050_TC_OFFSET_LENGTH 6
180 #define MPU6050_TC_OTP_BNK_VLD_BIT 0
181 
182 #define MPU6050_VDDIO_LEVEL_VLOGIC 0
183 #define MPU6050_VDDIO_LEVEL_VDD 1
184 
185 #define MPU6050_CFG_EXT_SYNC_SET_BIT 5
186 #define MPU6050_CFG_EXT_SYNC_SET_LENGTH 3
187 #define MPU6050_CFG_DLPF_CFG_BIT 2
188 #define MPU6050_CFG_DLPF_CFG_LENGTH 3
189 
190 #define MPU6050_EXT_SYNC_DISABLED 0x0
191 #define MPU6050_EXT_SYNC_TEMP_OUT_L 0x1
192 #define MPU6050_EXT_SYNC_GYRO_XOUT_L 0x2
193 #define MPU6050_EXT_SYNC_GYRO_YOUT_L 0x3
194 #define MPU6050_EXT_SYNC_GYRO_ZOUT_L 0x4
195 #define MPU6050_EXT_SYNC_ACCEL_XOUT_L 0x5
196 #define MPU6050_EXT_SYNC_ACCEL_YOUT_L 0x6
197 #define MPU6050_EXT_SYNC_ACCEL_ZOUT_L 0x7
198 
199 #define MPU6050_DLPF_BW_256 0x00
200 #define MPU6050_DLPF_BW_188 0x01
201 #define MPU6050_DLPF_BW_98 0x02
202 #define MPU6050_DLPF_BW_42 0x03
203 #define MPU6050_DLPF_BW_20 0x04
204 #define MPU6050_DLPF_BW_10 0x05
205 #define MPU6050_DLPF_BW_5 0x06
206 
207 #define MPU6050_GCONFIG_FS_SEL_BIT 4
208 #define MPU6050_GCONFIG_FS_SEL_LENGTH 2
209 
210 #define MPU6050_GYRO_FS_250 0x00
211 #define MPU6050_GYRO_FS_500 0x01
212 #define MPU6050_GYRO_FS_1000 0x02
213 #define MPU6050_GYRO_FS_2000 0x03
214 
215 #define MPU6050_ACONFIG_XA_ST_BIT 7
216 #define MPU6050_ACONFIG_YA_ST_BIT 6
217 #define MPU6050_ACONFIG_ZA_ST_BIT 5
218 #define MPU6050_ACONFIG_AFS_SEL_BIT 4
219 #define MPU6050_ACONFIG_AFS_SEL_LENGTH 2
220 #define MPU6050_ACONFIG_ACCEL_HPF_BIT 2
221 #define MPU6050_ACONFIG_ACCEL_HPF_LENGTH 3
222 
223 #define MPU6050_ACCEL_FS_2 0x00
224 #define MPU6050_ACCEL_FS_4 0x01
225 #define MPU6050_ACCEL_FS_8 0x02
226 #define MPU6050_ACCEL_FS_16 0x03
227 
228 #define MPU6050_DHPF_RESET 0x00
229 #define MPU6050_DHPF_5 0x01
230 #define MPU6050_DHPF_2P5 0x02
231 #define MPU6050_DHPF_1P25 0x03
232 #define MPU6050_DHPF_0P63 0x04
233 #define MPU6050_DHPF_HOLD 0x07
234 
235 #define MPU6050_TEMP_FIFO_EN_BIT 7
236 #define MPU6050_XG_FIFO_EN_BIT 6
237 #define MPU6050_YG_FIFO_EN_BIT 5
238 #define MPU6050_ZG_FIFO_EN_BIT 4
239 #define MPU6050_ACCEL_FIFO_EN_BIT 3
240 #define MPU6050_SLV2_FIFO_EN_BIT 2
241 #define MPU6050_SLV1_FIFO_EN_BIT 1
242 #define MPU6050_SLV0_FIFO_EN_BIT 0
243 
244 #define MPU6050_MULT_MST_EN_BIT 7
245 #define MPU6050_WAIT_FOR_ES_BIT 6
246 #define MPU6050_SLV_3_FIFO_EN_BIT 5
247 #define MPU6050_I2C_MST_P_NSR_BIT 4
248 #define MPU6050_I2C_MST_CLK_BIT 3
249 #define MPU6050_I2C_MST_CLK_LENGTH 4
250 
251 #define MPU6050_CLOCK_DIV_348 0x0
252 #define MPU6050_CLOCK_DIV_333 0x1
253 #define MPU6050_CLOCK_DIV_320 0x2
254 #define MPU6050_CLOCK_DIV_308 0x3
255 #define MPU6050_CLOCK_DIV_296 0x4
256 #define MPU6050_CLOCK_DIV_286 0x5
257 #define MPU6050_CLOCK_DIV_276 0x6
258 #define MPU6050_CLOCK_DIV_267 0x7
259 #define MPU6050_CLOCK_DIV_258 0x8
260 #define MPU6050_CLOCK_DIV_500 0x9
261 #define MPU6050_CLOCK_DIV_471 0xA
262 #define MPU6050_CLOCK_DIV_444 0xB
263 #define MPU6050_CLOCK_DIV_421 0xC
264 #define MPU6050_CLOCK_DIV_400 0xD
265 #define MPU6050_CLOCK_DIV_381 0xE
266 #define MPU6050_CLOCK_DIV_364 0xF
267 
268 #define MPU6050_I2C_SLV_RW_BIT 7
269 #define MPU6050_I2C_SLV_ADDR_BIT 6
270 #define MPU6050_I2C_SLV_ADDR_LENGTH 7
271 #define MPU6050_I2C_SLV_EN_BIT 7
272 #define MPU6050_I2C_SLV_BYTE_SW_BIT 6
273 #define MPU6050_I2C_SLV_REG_DIS_BIT 5
274 #define MPU6050_I2C_SLV_GRP_BIT 4
275 #define MPU6050_I2C_SLV_LEN_BIT 3
276 #define MPU6050_I2C_SLV_LEN_LENGTH 4
277 
278 #define MPU6050_I2C_SLV4_RW_BIT 7
279 #define MPU6050_I2C_SLV4_ADDR_BIT 6
280 #define MPU6050_I2C_SLV4_ADDR_LENGTH 7
281 #define MPU6050_I2C_SLV4_EN_BIT 7
282 #define MPU6050_I2C_SLV4_INT_EN_BIT 6
283 #define MPU6050_I2C_SLV4_REG_DIS_BIT 5
284 #define MPU6050_I2C_SLV4_MST_DLY_BIT 4
285 #define MPU6050_I2C_SLV4_MST_DLY_LENGTH 5
286 
287 #define MPU6050_MST_PASS_THROUGH_BIT 7
288 #define MPU6050_MST_I2C_SLV4_DONE_BIT 6
289 #define MPU6050_MST_I2C_LOST_ARB_BIT 5
290 #define MPU6050_MST_I2C_SLV4_NACK_BIT 4
291 #define MPU6050_MST_I2C_SLV3_NACK_BIT 3
292 #define MPU6050_MST_I2C_SLV2_NACK_BIT 2
293 #define MPU6050_MST_I2C_SLV1_NACK_BIT 1
294 #define MPU6050_MST_I2C_SLV0_NACK_BIT 0
295 
296 #define MPU6050_INTCFG_INT_LEVEL_BIT 7
297 #define MPU6050_INTCFG_INT_OPEN_BIT 6
298 #define MPU6050_INTCFG_LATCH_INT_EN_BIT 5
299 #define MPU6050_INTCFG_INT_RD_CLEAR_BIT 4
300 #define MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 3
301 #define MPU6050_INTCFG_FSYNC_INT_EN_BIT 2
302 #define MPU6050_INTCFG_I2C_BYPASS_EN_BIT 1
303 #define MPU6050_INTCFG_CLKOUT_EN_BIT 0
304 
305 #define MPU6050_INTMODE_ACTIVEHIGH 0x00
306 #define MPU6050_INTMODE_ACTIVELOW 0x01
307 
308 #define MPU6050_INTDRV_PUSHPULL 0x00
309 #define MPU6050_INTDRV_OPENDRAIN 0x01
310 
311 #define MPU6050_INTLATCH_50USPULSE 0x00
312 #define MPU6050_INTLATCH_WAITCLEAR 0x01
313 
314 #define MPU6050_INTCLEAR_STATUSREAD 0x00
315 #define MPU6050_INTCLEAR_ANYREAD 0x01
316 
317 #define MPU6050_INTERRUPT_FF_BIT 7
318 #define MPU6050_INTERRUPT_MOT_BIT 6
319 #define MPU6050_INTERRUPT_ZMOT_BIT 5
320 #define MPU6050_INTERRUPT_FIFO_OFLOW_BIT 4
321 #define MPU6050_INTERRUPT_I2C_MST_INT_BIT 3
322 #define MPU6050_INTERRUPT_PLL_RDY_INT_BIT 2
323 #define MPU6050_INTERRUPT_DMP_INT_BIT 1
324 #define MPU6050_INTERRUPT_DATA_RDY_BIT 0
325 
326 // TODO: figure out what these actually do
327 // UMPL source code is not very obivous
328 #define MPU6050_DMPINT_5_BIT 5
329 #define MPU6050_DMPINT_4_BIT 4
330 #define MPU6050_DMPINT_3_BIT 3
331 #define MPU6050_DMPINT_2_BIT 2
332 #define MPU6050_DMPINT_1_BIT 1
333 #define MPU6050_DMPINT_0_BIT 0
334 
335 #define MPU6050_MOTION_MOT_XNEG_BIT 7
336 #define MPU6050_MOTION_MOT_XPOS_BIT 6
337 #define MPU6050_MOTION_MOT_YNEG_BIT 5
338 #define MPU6050_MOTION_MOT_YPOS_BIT 4
339 #define MPU6050_MOTION_MOT_ZNEG_BIT 3
340 #define MPU6050_MOTION_MOT_ZPOS_BIT 2
341 #define MPU6050_MOTION_MOT_ZRMOT_BIT 0
342 
343 #define MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 7
344 #define MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT 4
345 #define MPU6050_DELAYCTRL_I2C_SLV3_DLY_EN_BIT 3
346 #define MPU6050_DELAYCTRL_I2C_SLV2_DLY_EN_BIT 2
347 #define MPU6050_DELAYCTRL_I2C_SLV1_DLY_EN_BIT 1
348 #define MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 0
349 
350 #define MPU6050_PATHRESET_GYRO_RESET_BIT 2
351 #define MPU6050_PATHRESET_ACCEL_RESET_BIT 1
352 #define MPU6050_PATHRESET_TEMP_RESET_BIT 0
353 
354 #define MPU6050_DETECT_ACCEL_ON_DELAY_BIT 5
355 #define MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH 2
356 #define MPU6050_DETECT_FF_COUNT_BIT 3
357 #define MPU6050_DETECT_FF_COUNT_LENGTH 2
358 #define MPU6050_DETECT_MOT_COUNT_BIT 1
359 #define MPU6050_DETECT_MOT_COUNT_LENGTH 2
360 
361 #define MPU6050_DETECT_DECREMENT_RESET 0x0
362 #define MPU6050_DETECT_DECREMENT_1 0x1
363 #define MPU6050_DETECT_DECREMENT_2 0x2
364 #define MPU6050_DETECT_DECREMENT_4 0x3
365 
366 #define MPU6050_USERCTRL_DMP_EN_BIT 7
367 #define MPU6050_USERCTRL_FIFO_EN_BIT 6
368 #define MPU6050_USERCTRL_I2C_MST_EN_BIT 5
369 #define MPU6050_USERCTRL_I2C_IF_DIS_BIT 4
370 #define MPU6050_USERCTRL_DMP_RESET_BIT 3
371 #define MPU6050_USERCTRL_FIFO_RESET_BIT 2
372 #define MPU6050_USERCTRL_I2C_MST_RESET_BIT 1
373 #define MPU6050_USERCTRL_SIG_COND_RESET_BIT 0
374 
375 #define MPU6050_PWR1_DEVICE_RESET_BIT 7
376 #define MPU6050_PWR1_SLEEP_BIT 6
377 #define MPU6050_PWR1_CYCLE_BIT 5
378 #define MPU6050_PWR1_TEMP_DIS_BIT 3
379 #define MPU6050_PWR1_CLKSEL_BIT 2
380 #define MPU6050_PWR1_CLKSEL_LENGTH 3
381 
382 #define MPU6050_CLOCK_INTERNAL 0x00
383 #define MPU6050_CLOCK_PLL_XGYRO 0x01
384 #define MPU6050_CLOCK_PLL_YGYRO 0x02
385 #define MPU6050_CLOCK_PLL_ZGYRO 0x03
386 #define MPU6050_CLOCK_PLL_EXT32K 0x04
387 #define MPU6050_CLOCK_PLL_EXT19M 0x05
388 #define MPU6050_CLOCK_KEEP_RESET 0x07
389 
390 #define MPU6050_PWR2_LP_WAKE_CTRL_BIT 7
391 #define MPU6050_PWR2_LP_WAKE_CTRL_LENGTH 2
392 #define MPU6050_PWR2_STBY_XA_BIT 5
393 #define MPU6050_PWR2_STBY_YA_BIT 4
394 #define MPU6050_PWR2_STBY_ZA_BIT 3
395 #define MPU6050_PWR2_STBY_XG_BIT 2
396 #define MPU6050_PWR2_STBY_YG_BIT 1
397 #define MPU6050_PWR2_STBY_ZG_BIT 0
398 
399 #define MPU6050_WAKE_FREQ_1P25 0x0
400 #define MPU6050_WAKE_FREQ_2P5 0x1
401 #define MPU6050_WAKE_FREQ_5 0x2
402 #define MPU6050_WAKE_FREQ_10 0x3
403 
404 #define MPU6050_BANKSEL_PRFTCH_EN_BIT 6
405 #define MPU6050_BANKSEL_CFG_USER_BANK_BIT 5
406 #define MPU6050_BANKSEL_MEM_SEL_BIT 4
407 #define MPU6050_BANKSEL_MEM_SEL_LENGTH 5
408 
409 #define MPU6050_WHO_AM_I_BIT 6
410 #define MPU6050_WHO_AM_I_LENGTH 6
411 
412 #define MPU6050_DMP_MEMORY_BANKS 8
413 #define MPU6050_DMP_MEMORY_BANK_SIZE 256
414 #define MPU6050_DMP_MEMORY_CHUNK_SIZE 16
415 
416 class MPU6050
417 {
418 public:
419  using SlaveId = uint8_t; // (0 - 3)
420 
421  struct Motion3 {
422  int16_t x{};
423  int16_t y{};
424  int16_t z{};
425  size_t printTo(Print& p) const;
426  };
427 
428  struct Motion6 {
431  size_t printTo(Print& p) const;
432  };
437  {
438  }
439 
446  MPU6050(uint8_t address) : devAddr{address}
447  {
448  }
449 
457  void initialize();
458 
464  {
465  return getDeviceID() == 0x34;
466  }
467 
468  // AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
476  {
478  }
479 
486  void setAuxVDDIOLevel(uint8_t level)
487  {
488  I2Cdev::writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level);
489  }
490 
491  // SMPLRT_DIV register
513  uint8_t getRate()
514  {
515  return readByte(MPU6050_RA_SMPLRT_DIV);
516  }
517 
523  void setRate(uint8_t rate)
524  {
525  I2Cdev::writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate);
526  }
527 
528  // CONFIG register
529 
558  {
560  }
566  void setExternalFrameSync(uint8_t sync)
567  {
569  sync);
570  }
599  uint8_t getDLPFMode()
600  {
602  }
611  void setDLPFMode(uint8_t mode)
612  {
613  I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode);
614  }
615 
616  // GYRO_CONFIG register
635  {
637  }
638 
647  void setFullScaleGyroRange(uint8_t range)
648  {
650  range);
651  }
652 
653  // SELF TEST FACTORY TRIM VALUES
659 
665 
671 
677 
683 
689 
690  // ACCEL_CONFIG register
691 
697  {
699  }
704  void setAccelXSelfTest(bool enabled)
705  {
706  I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled);
707  }
713  {
715  }
720  void setAccelYSelfTest(bool enabled)
721  {
722  I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled);
723  }
729  {
731  }
736  void setAccelZSelfTest(bool enabled)
737  {
738  I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled);
739  }
758  {
760  }
765  void setFullScaleAccelRange(uint8_t range)
766  {
768  range);
769  }
805  uint8_t getDHPFMode()
806  {
808  }
815  void setDHPFMode(uint8_t bandwidth)
816  {
817  I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT,
819  }
820 
821  // FF_THR register
822 
839  {
840  return readByte(MPU6050_RA_FF_THR);
841  }
847  void setFreefallDetectionThreshold(uint8_t threshold)
848  {
849  I2Cdev::writeByte(devAddr, MPU6050_RA_FF_THR, threshold);
850  }
851 
852  // FF_DUR register
853 
872  {
873  return readByte(MPU6050_RA_FF_DUR);
874  }
880  void setFreefallDetectionDuration(uint8_t duration)
881  {
882  I2Cdev::writeByte(devAddr, MPU6050_RA_FF_DUR, duration);
883  }
884 
885  // MOT_THR register
886 
907  {
908  return readByte(MPU6050_RA_MOT_THR);
909  }
916  void setMotionDetectionThreshold(uint8_t threshold)
917  {
918  I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_THR, threshold);
919  }
920 
921  // MOT_DUR register
922 
939  {
940  return readByte(MPU6050_RA_MOT_DUR);
941  }
947  void setMotionDetectionDuration(uint8_t duration)
948  {
949  I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_DUR, duration);
950  }
951 
952  // ZRMOT_THR register
953 
981  {
982  return readByte(MPU6050_RA_ZRMOT_THR);
983  }
990  void setZeroMotionDetectionThreshold(uint8_t threshold)
991  {
992  I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold);
993  }
994 
995  // ZRMOT_DUR register
996 
1014  {
1015  return readByte(MPU6050_RA_ZRMOT_DUR);
1016  }
1023  void setZeroMotionDetectionDuration(uint8_t duration)
1024  {
1025  I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration);
1026  }
1027 
1028  // FIFO_EN register
1029 
1037  {
1039  }
1045  void setTempFIFOEnabled(bool enabled)
1046  {
1047  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled);
1048  }
1056  {
1057  return readBit(MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT);
1058  }
1064  void setXGyroFIFOEnabled(bool enabled)
1065  {
1066  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled);
1067  }
1075  {
1076  return readBit(MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT);
1077  }
1083  void setYGyroFIFOEnabled(bool enabled)
1084  {
1085  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled);
1086  }
1094  {
1095  return readBit(MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT);
1096  }
1102  void setZGyroFIFOEnabled(bool enabled)
1103  {
1104  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled);
1105  }
1114  {
1116  }
1122  void setAccelFIFOEnabled(bool enabled)
1123  {
1124  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled);
1125  }
1133  {
1135  }
1141  void setSlave2FIFOEnabled(bool enabled)
1142  {
1143  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled);
1144  }
1152  {
1154  }
1160  void setSlave1FIFOEnabled(bool enabled)
1161  {
1162  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled);
1163  }
1171  {
1173  }
1179  void setSlave0FIFOEnabled(bool enabled)
1180  {
1181  I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled);
1182  }
1183 
1184  // I2C_MST_CTRL register
1185 
1202  {
1204  }
1210  void setMultiMasterEnabled(bool enabled)
1211  {
1212  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled);
1213  }
1226  {
1228  }
1235  {
1236  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled);
1237  }
1245  {
1247  }
1253  void setSlave3FIFOEnabled(bool enabled)
1254  {
1255  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled);
1256  }
1268  {
1270  }
1277  {
1278  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled);
1279  }
1310  {
1312  }
1317  void setMasterClockSpeed(uint8_t speed)
1318  {
1319  I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed);
1320  }
1321  // I2C_SLV* registers (Slave 0-3)
1322 
1364  uint8_t getSlaveAddress(SlaveId slaveId);
1371  void setSlaveAddress(SlaveId slaveId, uint8_t address);
1372 
1384  uint8_t getSlaveRegister(SlaveId slaveId);
1385 
1392  void setSlaveRegister(SlaveId slaveId, uint8_t reg);
1393 
1401  bool getSlaveEnabled(SlaveId slaveId);
1408  void setSlaveEnabled(SlaveId slaveId, bool enabled);
1409 
1422 
1429  void setSlaveWordByteSwap(SlaveId slaveId, bool enabled);
1430 
1450  void setSlaveWriteMode(SlaveId slaveId, bool mode);
1451 
1464 
1471  void setSlaveWordGroupOffset(SlaveId slaveId, bool enabled);
1472 
1480  uint8_t getSlaveDataLength(SlaveId slaveId);
1481 
1488  void setSlaveDataLength(SlaveId slaveId, uint8_t length);
1489 
1490  // I2C_SLV* registers (Slave 4)
1491 
1502  {
1503  return readByte(MPU6050_RA_I2C_SLV4_ADDR);
1504  }
1510  void setSlave4Address(uint8_t address)
1511  {
1512  I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address);
1513  }
1522  {
1523  return readByte(MPU6050_RA_I2C_SLV4_REG);
1524  }
1530  void setSlave4Register(uint8_t reg)
1531  {
1532  I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg);
1533  }
1540  void setSlave4OutputByte(uint8_t data)
1541  {
1542  I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data);
1543  }
1551  {
1553  }
1559  void setSlave4Enabled(bool enabled)
1560  {
1561  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled);
1562  }
1573  {
1575  }
1581  void setSlave4InterruptEnabled(bool enabled)
1582  {
1583  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled);
1584  }
1596  {
1598  }
1605  void setSlave4WriteMode(bool mode)
1606  {
1607  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode);
1608  }
1625  {
1627  }
1634  {
1635  I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT,
1637  }
1645  {
1646  return readByte(MPU6050_RA_I2C_SLV4_DI);
1647  }
1648 
1649  // I2C_MST_STATUS register
1650 
1661  {
1663  }
1673  {
1675  }
1684  {
1686  }
1695  {
1697  }
1706  {
1708  }
1717  {
1719  }
1728  {
1730  }
1739  {
1741  }
1742 
1743  // INT_PIN_CFG register
1744 
1752  {
1754  }
1761  void setInterruptMode(bool mode)
1762  {
1763  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode);
1764  }
1772  {
1774  }
1781  void setInterruptDrive(bool drive)
1782  {
1783  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive);
1784  }
1792  {
1794  }
1801  void setInterruptLatch(bool latch)
1802  {
1803  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch);
1804  }
1812  {
1814  }
1821  void setInterruptLatchClear(bool clear)
1822  {
1823  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear);
1824  }
1832  {
1834  }
1841  void setFSyncInterruptLevel(bool level)
1842  {
1843  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level);
1844  }
1852  {
1854  }
1861  void setFSyncInterruptEnabled(bool enabled)
1862  {
1863  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled);
1864  }
1877  {
1879  }
1891  void setI2CBypassEnabled(bool enabled)
1892  {
1893  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled);
1894  }
1905  {
1907  }
1917  void setClockOutputEnabled(bool enabled)
1918  {
1919  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled);
1920  }
1921 
1922  // INT_ENABLE register
1923 
1931  uint8_t getIntEnabled()
1932  {
1933  return readByte(MPU6050_RA_INT_ENABLE);
1934  }
1943  void setIntEnabled(uint8_t enabled)
1944  {
1945  I2Cdev::writeByte(devAddr, MPU6050_RA_INT_ENABLE, enabled);
1946  }
1954  {
1956  }
1963  void setIntFreefallEnabled(bool enabled)
1964  {
1965  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled);
1966  }
1974  {
1976  }
1983  void setIntMotionEnabled(bool enabled)
1984  {
1985  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled);
1986  }
1994  {
1996  }
2003  void setIntZeroMotionEnabled(bool enabled)
2004  {
2005  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled);
2006  }
2014  {
2016  }
2024  {
2025  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled);
2026  }
2035  {
2037  }
2044  void setIntI2CMasterEnabled(bool enabled)
2045  {
2046  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled);
2047  }
2056  {
2058  }
2065  void setIntDataReadyEnabled(bool enabled)
2066  {
2067  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled);
2068  }
2069 
2070  // INT_STATUS register
2071 
2079  uint8_t getIntStatus()
2080  {
2081  return readByte(MPU6050_RA_INT_STATUS);
2082  }
2091  {
2093  }
2102  {
2104  }
2105 
2114  {
2116  }
2117 
2126  {
2128  }
2129 
2139  {
2141  }
2142 
2151  {
2153  }
2154 
2155  // ACCEL_*OUT_* registers
2156 
2165 
2203 
2210  {
2211  return readReg<int16_t>(MPU6050_RA_ACCEL_XOUT_H);
2212  }
2219  {
2220  return readReg<int16_t>(MPU6050_RA_ACCEL_YOUT_H);
2221  }
2228  {
2229  return readReg<int16_t>(MPU6050_RA_ACCEL_ZOUT_H);
2230  }
2231 
2232  // TEMP_OUT_* registers
2233 
2238  int16_t getTemperature()
2239  {
2240  return readReg<int16_t>(MPU6050_RA_TEMP_OUT_H);
2241  }
2242 
2243  // GYRO_*OUT_* registers
2244 
2276 
2283  {
2284  return readReg<int16_t>(MPU6050_RA_GYRO_XOUT_H);
2285  }
2292  {
2293  return readReg<int16_t>(MPU6050_RA_GYRO_YOUT_H);
2294  }
2301  {
2302  return readReg<int16_t>(MPU6050_RA_GYRO_ZOUT_H);
2303  }
2304 
2306  {
2307  return readReg<int16_t>(MPU6050_RA_GYRO_ZOUT_H);
2308  }
2309 
2310  // EXT_SENS_DATA_* registers
2311 
2386  uint8_t getExternalSensorByte(int position)
2387  {
2388  return readByte(MPU6050_RA_EXT_SENS_DATA_00 + position);
2389  }
2395  uint16_t getExternalSensorWord(int position)
2396  {
2397  return readReg<uint16_t>(MPU6050_RA_EXT_SENS_DATA_00 + position);
2398  }
2404  uint32_t getExternalSensorDWord(int position)
2405  {
2406  return readReg<uint32_t>(MPU6050_RA_EXT_SENS_DATA_00 + position);
2407  }
2408 
2409  // MOT_DETECT_STATUS register
2410 
2416  {
2417  return readByte(MPU6050_RA_MOT_DETECT_STATUS);
2418  }
2425  {
2427  }
2434  {
2436  }
2443  {
2445  }
2452  {
2454  }
2461  {
2463  }
2470  {
2472  }
2479  {
2481  }
2482 
2483  // I2C_SLV*_DO register
2484 
2493  void setSlaveOutputByte(SlaveId slaveId, uint8_t data);
2494 
2495  // I2C_MST_DELAY_CTRL register
2505  {
2507  }
2515  {
2516  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
2517  }
2518 
2539 
2546  void setSlaveDelayEnabled(SlaveId slaveId, bool enabled)
2547  {
2548  I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, slaveId, enabled);
2549  }
2550 
2551  // SIGNAL_PATH_RESET register
2552 
2560  {
2561  I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true);
2562  }
2570  {
2571  I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true);
2572  }
2580  {
2581  I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true);
2582  }
2583 
2584  // MOT_DETECT_CTRL register
2585 
2601  {
2604  }
2612  {
2615  }
2643  {
2645  }
2653  {
2654  I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT,
2655  MPU6050_DETECT_FF_COUNT_LENGTH, decrement);
2656  }
2681  {
2683  }
2690  void setMotionDetectionCounterDecrement(uint8_t decrement)
2691  {
2692  I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT,
2693  MPU6050_DETECT_MOT_COUNT_LENGTH, decrement);
2694  }
2695 
2696  // USER_CTRL register
2697 
2707  {
2709  }
2716  void setFIFOEnabled(bool enabled)
2717  {
2718  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled);
2719  }
2732  {
2734  }
2741  void setI2CMasterModeEnabled(bool enabled)
2742  {
2743  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled);
2744  }
2749  void switchSPIEnabled(bool enabled)
2750  {
2751  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled);
2752  }
2759  void resetFIFO()
2760  {
2761  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true);
2762  }
2770  {
2771  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true);
2772  }
2786  {
2787  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true);
2788  }
2789 
2790  // PWR_MGMT_1 register
2791 
2797  void reset()
2798  {
2799  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true);
2800  }
2813  {
2815  }
2822  void setSleepEnabled(bool enabled)
2823  {
2824  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled);
2825  }
2835  {
2837  }
2844  void setWakeCycleEnabled(bool enabled)
2845  {
2846  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled);
2847  }
2860  {
2861  return readBit(MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT); // 1 is actually disabled here
2862  }
2873  void setTempSensorEnabled(bool enabled)
2874  {
2875  // 1 is actually disabled here
2876  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled);
2877  }
2884  uint8_t getClockSource()
2885  {
2887  }
2919  void setClockSource(uint8_t source)
2920  {
2921  I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source);
2922  }
2923 
2924  // PWR_MGMT_2 register
2925 
2950  {
2952  }
2957  void setWakeFrequency(uint8_t frequency)
2958  {
2959  I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT,
2961  }
2962 
2970  {
2972  }
2979  void setStandbyXAccelEnabled(bool enabled)
2980  {
2981  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled);
2982  }
2990  {
2992  }
2999  void setStandbyYAccelEnabled(bool enabled)
3000  {
3001  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled);
3002  }
3010  {
3012  }
3019  void setStandbyZAccelEnabled(bool enabled)
3020  {
3021  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled);
3022  }
3030  {
3032  }
3039  void setStandbyXGyroEnabled(bool enabled)
3040  {
3041  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled);
3042  }
3050  {
3052  }
3059  void setStandbyYGyroEnabled(bool enabled)
3060  {
3061  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled);
3062  }
3070  {
3072  }
3079  void setStandbyZGyroEnabled(bool enabled)
3080  {
3081  I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled);
3082  }
3083 
3084  // FIFO_COUNT* registers
3085 
3093  uint16_t getFIFOCount()
3094  {
3095  uint8_t buffer[2] = {0};
3096  I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer);
3097  return (((uint16_t)buffer[0]) << 8) | buffer[1];
3098  }
3099 
3100  // FIFO_R_W register
3101 
3127  uint8_t getFIFOByte()
3128  {
3129  return readByte(MPU6050_RA_FIFO_R_W);
3130  }
3131 
3136  void setFIFOByte(uint8_t data)
3137  {
3138  I2Cdev::writeByte(devAddr, MPU6050_RA_FIFO_R_W, data);
3139  }
3140 
3141  void getFIFOBytes(uint8_t* data, uint8_t length)
3142  {
3143  I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_R_W, length, data);
3144  }
3145 
3146  // WHO_AM_I register
3147 
3155  uint8_t getDeviceID()
3156  {
3158  }
3168  void setDeviceID(uint8_t id)
3169  {
3170  I2Cdev::writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id);
3171  }
3172 
3173  // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
3174 
3175  // XG_OFFS_TC register
3176 
3178  {
3180  }
3181  void setOTPBankValid(bool enabled)
3182  {
3183  I2Cdev::writeBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, enabled);
3184  }
3186  {
3188  }
3189  void setXGyroOffsetTC(int8_t offset)
3190  {
3191  I2Cdev::writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
3192  }
3193 
3194  // YG_OFFS_TC register
3195 
3197  {
3199  }
3200  void setYGyroOffsetTC(int8_t offset)
3201  {
3202  I2Cdev::writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
3203  }
3204 
3205  // ZG_OFFS_TC register
3206 
3208  {
3210  }
3211  void setZGyroOffsetTC(int8_t offset)
3212  {
3213  I2Cdev::writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
3214  }
3215 
3216  // X_FINE_GAIN register
3217 
3218  int8_t getXFineGain()
3219  {
3220  return readByte(MPU6050_RA_X_FINE_GAIN);
3221  }
3222  void setXFineGain(int8_t gain)
3223  {
3224  I2Cdev::writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain);
3225  }
3226 
3227  // Y_FINE_GAIN register
3228 
3229  int8_t getYFineGain()
3230  {
3231  return readByte(MPU6050_RA_Y_FINE_GAIN);
3232  }
3233  void setYFineGain(int8_t gain)
3234  {
3235  I2Cdev::writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain);
3236  }
3237 
3238  // Z_FINE_GAIN register
3239 
3240  int8_t getZFineGain()
3241  {
3242  return readByte(MPU6050_RA_Z_FINE_GAIN);
3243  }
3244  void setZFineGain(int8_t gain)
3245  {
3246  I2Cdev::writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain);
3247  }
3248 
3249  // XA_OFFS_* registers
3250  int16_t getXAccelOffset();
3251  void setXAccelOffset(int16_t offset)
3252  {
3253  I2Cdev::writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset);
3254  }
3255 
3256  // YA_OFFS_* register
3257  int16_t getYAccelOffset();
3258  void setYAccelOffset(int16_t offset)
3259  {
3260  I2Cdev::writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset);
3261  }
3262 
3263  // ZA_OFFS_* register
3264  int16_t getZAccelOffset();
3265  void setZAccelOffset(int16_t offset)
3266  {
3267  I2Cdev::writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset);
3268  }
3269 
3270  // XG_OFFS_USR* registers
3271  int16_t getXGyroOffset()
3272  {
3273  return readReg<int16_t>(MPU6050_RA_XG_OFFS_USRH);
3274  }
3275  void setXGyroOffset(int16_t offset)
3276  {
3277  I2Cdev::writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset);
3278  }
3279  // YG_OFFS_USR* register
3280  int16_t getYGyroOffset()
3281  {
3282  return readReg<int16_t>(MPU6050_RA_YG_OFFS_USRH);
3283  }
3284 
3285  void setYGyroOffset(int16_t offset)
3286  {
3287  I2Cdev::writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset);
3288  }
3289 
3290  // ZG_OFFS_USR* register
3291  int16_t getZGyroOffset()
3292  {
3293  return readReg<int16_t>(MPU6050_RA_ZG_OFFS_USRH);
3294  }
3295 
3296  void setZGyroOffset(int16_t offset)
3297  {
3298  I2Cdev::writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset);
3299  }
3300 
3301  // INT_ENABLE register (DMP functions)
3303  {
3305  }
3306  void setIntPLLReadyEnabled(bool enabled)
3307  {
3308  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled);
3309  }
3311  {
3313  }
3314  void setIntDMPEnabled(bool enabled)
3315  {
3316  I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled);
3317  }
3318 
3319  // DMP_INT_STATUS
3321  {
3323  }
3325  {
3327  }
3329  {
3331  }
3333  {
3335  }
3337  {
3339  }
3341  {
3343  }
3344 
3345  // INT_STATUS register (DMP functions)
3346 
3348  {
3350  }
3352  {
3354  }
3355 
3356  // USER_CTRL register (DMP functions)
3357 
3359  {
3361  }
3362  void setDMPEnabled(bool enabled)
3363  {
3364  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled);
3365  }
3366  void resetDMP()
3367  {
3368  I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true);
3369  }
3370 
3371  // BANK_SEL register
3372  void setMemoryBank(uint8_t bank, bool prefetchEnabled = false, bool userBank = false);
3373 
3374  // MEM_START_ADDR register
3375  void setMemoryStartAddress(uint8_t address)
3376  {
3377  I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address);
3378  }
3379 
3380  // MEM_R_W register
3381  uint8_t readMemoryByte()
3382  {
3383  return readByte(MPU6050_RA_MEM_R_W);
3384  }
3385 
3386  void writeMemoryByte(uint8_t data)
3387  {
3388  I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_R_W, data);
3389  }
3390 
3391  // DMP_CFG_1 register
3392  uint8_t getDMPConfig1()
3393  {
3394  return readByte(MPU6050_RA_DMP_CFG_1);
3395  }
3396 
3397  void setDMPConfig1(uint8_t config)
3398  {
3399  I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config);
3400  }
3401 
3402  // DMP_CFG_2 register
3403  uint8_t getDMPConfig2()
3404  {
3405  return readByte(MPU6050_RA_DMP_CFG_2);
3406  }
3407 
3408  void setDMPConfig2(uint8_t config)
3409  {
3410  I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config);
3411  }
3412 
3413 private:
3414  // I2C helpers
3415  uint8_t readBit(uint8_t regAddr, uint8_t bitNum);
3416  uint8_t readBits(uint8_t regAddr, uint8_t bitStart, uint8_t length);
3417  uint8_t readByte(uint8_t regAddr);
3418 
3419  template <typename T> T readReg(uint8_t regAddr);
3420 
3421  uint8_t devAddr;
3422 };
3423 
3424 template <typename T> T MPU6050::readReg(uint8_t regAddr)
3425 {
3426  static_assert(std::is_fundamental<T>::value, "T must be an fundamental type.");
3427 
3428  const auto sz = sizeof(T);
3429  uint8_t buffer[sz] = {0};
3430  //data follow big endian convention
3431  I2Cdev::readBytes(devAddr, regAddr, sz, buffer);
3432 
3433  T result{};
3434  for(size_t i{0}; i < sz; ++i) {
3435  result |= static_cast<T>(buffer[i]) << (8 * (sz - i - 1));
3436  }
3437  return result;
3438 }
3439 
3440 namespace detail
3441 {
3442 template <typename T = int16_t> inline T concat(uint8_t bits_15_8, uint8_t bits_7_0)
3443 {
3444  return (static_cast<T>(bits_15_8) << 8) | bits_7_0;
3445 }
3446 } // namespace detail
#define MPU6050_I2C_MST_CLK_LENGTH
Definition: MPU6050.h:249
#define MPU6050_RA_GYRO_CONFIG
Definition: MPU6050.h:66
#define MPU6050_DETECT_MOT_COUNT_LENGTH
Definition: MPU6050.h:359
#define MPU6050_ACONFIG_XA_ST_BIT
Definition: MPU6050.h:215
#define MPU6050_MULT_MST_EN_BIT
Definition: MPU6050.h:244
#define MPU6050_RA_Z_FINE_GAIN
Definition: MPU6050.h:47
#define MPU6050_INTCFG_INT_LEVEL_BIT
Definition: MPU6050.h:296
#define MPU6050_TC_PWR_MODE_BIT
Definition: MPU6050.h:177
#define MPU6050_RA_FIFO_EN
Definition: MPU6050.h:74
#define MPU6050_CFG_DLPF_CFG_LENGTH
Definition: MPU6050.h:188
#define MPU6050_RA_SMPLRT_DIV
Definition: MPU6050.h:64
#define MPU6050_TC_OFFSET_BIT
Definition: MPU6050.h:178
#define MPU6050_ZG_FIFO_EN_BIT
Definition: MPU6050.h:238
#define MPU6050_RA_MEM_R_W
Definition: MPU6050.h:149
#define MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
Definition: MPU6050.h:300
#define MPU6050_USERCTRL_I2C_MST_EN_BIT
Definition: MPU6050.h:368
#define MPU6050_USERCTRL_SIG_COND_RESET_BIT
Definition: MPU6050.h:373
#define MPU6050_SLV2_FIFO_EN_BIT
Definition: MPU6050.h:240
#define MPU6050_RA_INT_ENABLE
Definition: MPU6050.h:95
#define MPU6050_YG_FIFO_EN_BIT
Definition: MPU6050.h:237
#define MPU6050_PWR1_CLKSEL_LENGTH
Definition: MPU6050.h:380
#define MPU6050_MOTION_MOT_ZPOS_BIT
Definition: MPU6050.h:340
#define MPU6050_RA_ACCEL_ZOUT_H
Definition: MPU6050.h:102
#define MPU6050_DETECT_FF_COUNT_LENGTH
Definition: MPU6050.h:357
#define MPU6050_RA_MOT_DUR
Definition: MPU6050.h:71
#define MPU6050_I2C_SLV4_INT_EN_BIT
Definition: MPU6050.h:282
#define MPU6050_I2C_SLV4_MST_DLY_BIT
Definition: MPU6050.h:284
#define MPU6050_RA_I2C_SLV4_CTRL
Definition: MPU6050.h:91
#define MPU6050_RA_MEM_START_ADDR
Definition: MPU6050.h:148
#define MPU6050_RA_ZG_OFFS_USRH
Definition: MPU6050.h:62
#define MPU6050_PWR1_SLEEP_BIT
Definition: MPU6050.h:376
#define MPU6050_ACONFIG_ACCEL_HPF_BIT
Definition: MPU6050.h:220
#define MPU6050_DETECT_ACCEL_ON_DELAY_BIT
Definition: MPU6050.h:354
#define MPU6050_CFG_EXT_SYNC_SET_LENGTH
Definition: MPU6050.h:186
#define MPU6050_MST_PASS_THROUGH_BIT
Definition: MPU6050.h:287
#define MPU6050_I2C_MST_CLK_BIT
Definition: MPU6050.h:248
#define MPU6050_RA_FF_THR
Definition: MPU6050.h:68
#define MPU6050_INTCFG_FSYNC_INT_EN_BIT
Definition: MPU6050.h:301
#define MPU6050_RA_I2C_SLV4_ADDR
Definition: MPU6050.h:88
#define MPU6050_ACCEL_FIFO_EN_BIT
Definition: MPU6050.h:239
#define MPU6050_ACONFIG_ACCEL_HPF_LENGTH
Definition: MPU6050.h:221
#define MPU6050_WHO_AM_I_BIT
Definition: MPU6050.h:409
#define MPU6050_MST_I2C_SLV4_DONE_BIT
Definition: MPU6050.h:288
#define MPU6050_RA_YA_OFFS_H
Definition: MPU6050.h:50
#define MPU6050_RA_I2C_SLV4_DO
Definition: MPU6050.h:90
#define MPU6050_DETECT_MOT_COUNT_BIT
Definition: MPU6050.h:358
#define MPU6050_RA_MOT_THR
Definition: MPU6050.h:70
#define MPU6050_RA_YG_OFFS_TC
Definition: MPU6050.h:43
#define MPU6050_INTCFG_INT_RD_CLEAR_BIT
Definition: MPU6050.h:299
#define MPU6050_INTERRUPT_DMP_INT_BIT
Definition: MPU6050.h:323
#define MPU6050_RA_ACCEL_CONFIG
Definition: MPU6050.h:67
#define MPU6050_USERCTRL_DMP_RESET_BIT
Definition: MPU6050.h:370
#define MPU6050_CFG_EXT_SYNC_SET_BIT
Definition: MPU6050.h:185
#define MPU6050_MOTION_MOT_XNEG_BIT
Definition: MPU6050.h:335
#define MPU6050_ACONFIG_ZA_ST_BIT
Definition: MPU6050.h:217
#define MPU6050_USERCTRL_FIFO_EN_BIT
Definition: MPU6050.h:367
#define MPU6050_PATHRESET_TEMP_RESET_BIT
Definition: MPU6050.h:352
#define MPU6050_RA_FIFO_R_W
Definition: MPU6050.h:154
#define MPU6050_I2C_MST_P_NSR_BIT
Definition: MPU6050.h:247
#define MPU6050_INTERRUPT_MOT_BIT
Definition: MPU6050.h:318
#define MPU6050_RA_CONFIG
Definition: MPU6050.h:65
#define MPU6050_MOTION_MOT_YNEG_BIT
Definition: MPU6050.h:337
#define MPU6050_DMPINT_0_BIT
Definition: MPU6050.h:333
#define MPU6050_INTCFG_LATCH_INT_EN_BIT
Definition: MPU6050.h:298
#define MPU6050_RA_ZRMOT_DUR
Definition: MPU6050.h:73
#define MPU6050_RA_I2C_SLV4_REG
Definition: MPU6050.h:89
#define MPU6050_RA_MOT_DETECT_STATUS
Definition: MPU6050.h:136
#define MPU6050_RA_YG_OFFS_USRH
Definition: MPU6050.h:60
#define MPU6050_RA_I2C_MST_STATUS
Definition: MPU6050.h:93
#define MPU6050_USERCTRL_I2C_IF_DIS_BIT
Definition: MPU6050.h:369
#define MPU6050_USERCTRL_DMP_EN_BIT
Definition: MPU6050.h:366
#define MPU6050_MST_I2C_SLV0_NACK_BIT
Definition: MPU6050.h:294
#define MPU6050_DMPINT_1_BIT
Definition: MPU6050.h:332
#define MPU6050_PWR2_STBY_ZG_BIT
Definition: MPU6050.h:397
#define MPU6050_RA_XG_OFFS_USRH
Definition: MPU6050.h:58
#define MPU6050_I2C_SLV4_REG_DIS_BIT
Definition: MPU6050.h:283
#define MPU6050_MST_I2C_SLV1_NACK_BIT
Definition: MPU6050.h:293
#define MPU6050_RA_ZG_OFFS_TC
Definition: MPU6050.h:44
#define MPU6050_PWR1_CLKSEL_BIT
Definition: MPU6050.h:379
#define MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
Definition: MPU6050.h:343
#define MPU6050_DETECT_FF_COUNT_BIT
Definition: MPU6050.h:356
#define MPU6050_PWR1_CYCLE_BIT
Definition: MPU6050.h:377
#define MPU6050_PWR1_DEVICE_RESET_BIT
Definition: MPU6050.h:375
#define MPU6050_SLV0_FIFO_EN_BIT
Definition: MPU6050.h:242
#define MPU6050_RA_I2C_SLV4_DI
Definition: MPU6050.h:92
#define MPU6050_TEMP_FIFO_EN_BIT
Definition: MPU6050.h:235
#define MPU6050_PWR2_STBY_YG_BIT
Definition: MPU6050.h:396
#define MPU6050_RA_INT_PIN_CFG
Definition: MPU6050.h:94
#define MPU6050_RA_INT_STATUS
Definition: MPU6050.h:97
#define MPU6050_MST_I2C_SLV2_NACK_BIT
Definition: MPU6050.h:292
#define MPU6050_RA_WHO_AM_I
Definition: MPU6050.h:155
#define MPU6050_MOTION_MOT_ZRMOT_BIT
Definition: MPU6050.h:341
#define MPU6050_RA_ZRMOT_THR
Definition: MPU6050.h:72
#define MPU6050_ACONFIG_AFS_SEL_BIT
Definition: MPU6050.h:218
#define MPU6050_RA_Y_FINE_GAIN
Definition: MPU6050.h:46
#define MPU6050_DMPINT_5_BIT
Definition: MPU6050.h:328
#define MPU6050_WAIT_FOR_ES_BIT
Definition: MPU6050.h:245
#define MPU6050_DMPINT_2_BIT
Definition: MPU6050.h:331
#define MPU6050_MST_I2C_LOST_ARB_BIT
Definition: MPU6050.h:289
#define MPU6050_INTERRUPT_PLL_RDY_INT_BIT
Definition: MPU6050.h:322
#define MPU6050_PWR2_STBY_ZA_BIT
Definition: MPU6050.h:394
#define MPU6050_RA_DMP_INT_STATUS
Definition: MPU6050.h:96
#define MPU6050_RA_X_FINE_GAIN
Definition: MPU6050.h:45
#define MPU6050_PWR2_STBY_XA_BIT
Definition: MPU6050.h:392
#define MPU6050_RA_I2C_MST_DELAY_CTRL
Definition: MPU6050.h:141
#define MPU6050_INTERRUPT_FF_BIT
Definition: MPU6050.h:317
#define MPU6050_PWR2_LP_WAKE_CTRL_BIT
Definition: MPU6050.h:390
#define MPU6050_TC_OTP_BNK_VLD_BIT
Definition: MPU6050.h:180
#define MPU6050_RA_GYRO_YOUT_H
Definition: MPU6050.h:108
#define MPU6050_INTERRUPT_FIFO_OFLOW_BIT
Definition: MPU6050.h:320
#define MPU6050_RA_ACCEL_XOUT_H
Definition: MPU6050.h:98
#define MPU6050_MST_I2C_SLV3_NACK_BIT
Definition: MPU6050.h:291
#define MPU6050_GCONFIG_FS_SEL_LENGTH
Definition: MPU6050.h:208
#define MPU6050_RA_TEMP_OUT_H
Definition: MPU6050.h:104
#define MPU6050_INTERRUPT_ZMOT_BIT
Definition: MPU6050.h:319
#define MPU6050_MST_I2C_SLV4_NACK_BIT
Definition: MPU6050.h:290
#define MPU6050_MOTION_MOT_XPOS_BIT
Definition: MPU6050.h:336
#define MPU6050_PWR2_STBY_XG_BIT
Definition: MPU6050.h:395
#define MPU6050_RA_XA_OFFS_H
Definition: MPU6050.h:48
#define MPU6050_XG_FIFO_EN_BIT
Definition: MPU6050.h:236
#define MPU6050_PATHRESET_ACCEL_RESET_BIT
Definition: MPU6050.h:351
#define MPU6050_RA_PWR_MGMT_2
Definition: MPU6050.h:146
#define MPU6050_PWR2_LP_WAKE_CTRL_LENGTH
Definition: MPU6050.h:391
#define MPU6050_RA_FF_DUR
Definition: MPU6050.h:69
#define MPU6050_RA_FIFO_COUNTH
Definition: MPU6050.h:152
#define MPU6050_WHO_AM_I_LENGTH
Definition: MPU6050.h:410
#define MPU6050_INTCFG_I2C_BYPASS_EN_BIT
Definition: MPU6050.h:302
#define MPU6050_RA_DMP_CFG_2
Definition: MPU6050.h:151
#define MPU6050_I2C_SLV4_EN_BIT
Definition: MPU6050.h:281
#define MPU6050_USERCTRL_I2C_MST_RESET_BIT
Definition: MPU6050.h:372
#define MPU6050_ACONFIG_YA_ST_BIT
Definition: MPU6050.h:216
#define MPU6050_RA_GYRO_XOUT_H
Definition: MPU6050.h:106
#define MPU6050_RA_GYRO_ZOUT_H
Definition: MPU6050.h:110
#define MPU6050_ACONFIG_AFS_SEL_LENGTH
Definition: MPU6050.h:219
#define MPU6050_TC_OFFSET_LENGTH
Definition: MPU6050.h:179
#define MPU6050_RA_PWR_MGMT_1
Definition: MPU6050.h:145
#define MPU6050_I2C_SLV4_MST_DLY_LENGTH
Definition: MPU6050.h:285
#define MPU6050_PATHRESET_GYRO_RESET_BIT
Definition: MPU6050.h:350
#define MPU6050_SLV_3_FIFO_EN_BIT
Definition: MPU6050.h:246
#define MPU6050_RA_SIGNAL_PATH_RESET
Definition: MPU6050.h:142
#define MPU6050_RA_ACCEL_YOUT_H
Definition: MPU6050.h:100
#define MPU6050_RA_USER_CTRL
Definition: MPU6050.h:144
#define MPU6050_MOTION_MOT_ZNEG_BIT
Definition: MPU6050.h:339
#define MPU6050_USERCTRL_FIFO_RESET_BIT
Definition: MPU6050.h:371
#define MPU6050_CFG_DLPF_CFG_BIT
Definition: MPU6050.h:187
#define MPU6050_MOTION_MOT_YPOS_BIT
Definition: MPU6050.h:338
#define MPU6050_RA_I2C_MST_CTRL
Definition: MPU6050.h:75
#define MPU6050_DEFAULT_ADDRESS
Definition: MPU6050.h:40
#define MPU6050_DMPINT_4_BIT
Definition: MPU6050.h:329
#define MPU6050_RA_MOT_DETECT_CTRL
Definition: MPU6050.h:143
#define MPU6050_INTCFG_INT_OPEN_BIT
Definition: MPU6050.h:297
#define MPU6050_RA_DMP_CFG_1
Definition: MPU6050.h:150
#define MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH
Definition: MPU6050.h:355
#define MPU6050_RA_ZA_OFFS_H
Definition: MPU6050.h:52
#define MPU6050_INTERRUPT_DATA_RDY_BIT
Definition: MPU6050.h:324
#define MPU6050_INTCFG_CLKOUT_EN_BIT
Definition: MPU6050.h:303
#define MPU6050_DMPINT_3_BIT
Definition: MPU6050.h:330
#define MPU6050_PWR1_TEMP_DIS_BIT
Definition: MPU6050.h:378
#define MPU6050_INTERRUPT_I2C_MST_INT_BIT
Definition: MPU6050.h:321
#define MPU6050_RA_EXT_SENS_DATA_00
Definition: MPU6050.h:112
#define MPU6050_RA_XG_OFFS_TC
Definition: MPU6050.h:42
#define MPU6050_GCONFIG_FS_SEL_BIT
Definition: MPU6050.h:207
#define MPU6050_SLV1_FIFO_EN_BIT
Definition: MPU6050.h:241
#define MPU6050_PWR2_STBY_YA_BIT
Definition: MPU6050.h:393
Definition: MPU6050.h:417
void setInterruptMode(bool mode)
Definition: MPU6050.h:1761
void setTempSensorEnabled(bool enabled)
Definition: MPU6050.h:2873
void setDMPConfig1(uint8_t config)
Definition: MPU6050.h:3397
void setIntFreefallEnabled(bool enabled)
Definition: MPU6050.h:1963
int16_t getAngularRateZ()
Definition: MPU6050.h:2300
void setMultiMasterEnabled(bool enabled)
Definition: MPU6050.h:1210
void setSlave4Enabled(bool enabled)
Definition: MPU6050.h:1559
uint8_t getZeroMotionDetectionDuration()
Definition: MPU6050.h:1013
bool getSlave4InterruptEnabled()
Definition: MPU6050.h:1572
bool getIntFreefallStatus()
Definition: MPU6050.h:2090
void setOTPBankValid(bool enabled)
Definition: MPU6050.h:3181
uint8_t getSlaveDataLength(SlaveId slaveId)
uint8_t getAccelXSelfTestFactoryTrim()
bool getExternalShadowDelayEnabled()
Definition: MPU6050.h:2504
uint8_t getMotionDetectionCounterDecrement()
Definition: MPU6050.h:2680
uint8_t getFullScaleAccelRange()
Definition: MPU6050.h:757
bool getStandbyYAccelEnabled()
Definition: MPU6050.h:2989
bool getSlave4IsDone()
Definition: MPU6050.h:1672
int8_t getZFineGain()
Definition: MPU6050.h:3240
bool getSlaveWordByteSwap(SlaveId slaveId)
void setSleepEnabled(bool enabled)
Definition: MPU6050.h:2822
void setYGyroFIFOEnabled(bool enabled)
Definition: MPU6050.h:1083
void setSlave4OutputByte(uint8_t data)
Definition: MPU6050.h:1540
int16_t getYGyroOffset()
Definition: MPU6050.h:3280
void setFreefallDetectionCounterDecrement(uint8_t decrement)
Definition: MPU6050.h:2652
bool getSleepEnabled()
Definition: MPU6050.h:2812
bool getDMPInt3Status()
Definition: MPU6050.h:3328
void setZGyroOffsetTC(int8_t offset)
Definition: MPU6050.h:3211
void setWaitForExternalSensorEnabled(bool enabled)
Definition: MPU6050.h:1234
void writeMemoryByte(uint8_t data)
Definition: MPU6050.h:3386
bool getStandbyZGyroEnabled()
Definition: MPU6050.h:3069
int16_t getAngularRateZ2()
Definition: MPU6050.h:2305
uint8_t getWakeFrequency()
Definition: MPU6050.h:2949
bool getAccelYSelfTest()
Definition: MPU6050.h:712
void switchSPIEnabled(bool enabled)
Definition: MPU6050.h:2749
int16_t getAccelerationY()
Definition: MPU6050.h:2218
bool getIntI2CMasterEnabled()
Definition: MPU6050.h:2034
uint8_t getDMPConfig2()
Definition: MPU6050.h:3403
uint8_t getIntEnabled()
Definition: MPU6050.h:1931
bool getDMPEnabled()
Definition: MPU6050.h:3358
void setFSyncInterruptLevel(bool level)
Definition: MPU6050.h:1841
bool getDMPInt0Status()
Definition: MPU6050.h:3340
void setAccelerometerPowerOnDelay(uint8_t delay)
Definition: MPU6050.h:2611
void setSlaveRegister(SlaveId slaveId, uint8_t reg)
void setIntMotionEnabled(bool enabled)
Definition: MPU6050.h:1983
void setInterruptLatchClear(bool clear)
Definition: MPU6050.h:1821
bool getIntI2CMasterStatus()
Definition: MPU6050.h:2138
bool getTempSensorEnabled()
Definition: MPU6050.h:2859
uint8_t SlaveId
Definition: MPU6050.h:419
bool getZPosMotionDetected()
Definition: MPU6050.h:2469
void setWakeCycleEnabled(bool enabled)
Definition: MPU6050.h:2844
void setSlaveReadWriteTransitionEnabled(bool enabled)
Definition: MPU6050.h:1276
void setZeroMotionDetectionThreshold(uint8_t threshold)
Definition: MPU6050.h:990
uint8_t getDeviceID()
Definition: MPU6050.h:3155
bool getZNegMotionDetected()
Definition: MPU6050.h:2460
bool getZeroMotionDetected()
Definition: MPU6050.h:2478
void setSlave2FIFOEnabled(bool enabled)
Definition: MPU6050.h:1141
bool getDMPInt5Status()
Definition: MPU6050.h:3320
bool getIntDMPEnabled()
Definition: MPU6050.h:3310
bool getSlave2FIFOEnabled()
Definition: MPU6050.h:1132
uint8_t getFreefallDetectionDuration()
Definition: MPU6050.h:871
uint8_t getSlaveAddress(SlaveId slaveId)
bool getXPosMotionDetected()
Definition: MPU6050.h:2433
void setFreefallDetectionDuration(uint8_t duration)
Definition: MPU6050.h:880
uint8_t getDMPConfig1()
Definition: MPU6050.h:3392
uint8_t getSlave4Address()
Definition: MPU6050.h:1501
bool getXNegMotionDetected()
Definition: MPU6050.h:2424
void setXAccelOffset(int16_t offset)
Definition: MPU6050.h:3251
void setMemoryStartAddress(uint8_t address)
Definition: MPU6050.h:3375
uint8_t getAccelZSelfTestFactoryTrim()
bool getSlave4Enabled()
Definition: MPU6050.h:1550
bool getFSyncInterruptEnabled()
Definition: MPU6050.h:1851
int16_t getXGyroOffset()
Definition: MPU6050.h:3271
void setClockSource(uint8_t source)
Definition: MPU6050.h:2919
uint8_t getDHPFMode()
Definition: MPU6050.h:805
uint8_t getMasterClockSpeed()
Definition: MPU6050.h:1309
bool getIntPLLReadyEnabled()
Definition: MPU6050.h:3302
void setZAccelOffset(int16_t offset)
Definition: MPU6050.h:3265
bool getWaitForExternalSensorEnabled()
Definition: MPU6050.h:1225
uint8_t readMemoryByte()
Definition: MPU6050.h:3381
bool getIntFreefallEnabled()
Definition: MPU6050.h:1953
void setSlaveDelayEnabled(SlaveId slaveId, bool enabled)
Definition: MPU6050.h:2546
bool getSlaveWriteMode(SlaveId slaveId)
void setXGyroFIFOEnabled(bool enabled)
Definition: MPU6050.h:1064
bool getInterruptLatch()
Definition: MPU6050.h:1791
uint8_t getIntStatus()
Definition: MPU6050.h:2079
void resetTemperaturePath()
Definition: MPU6050.h:2579
bool getIntPLLReadyStatus()
Definition: MPU6050.h:3347
bool getSlave3Nack()
Definition: MPU6050.h:1705
bool getIntFIFOBufferOverflowEnabled()
Definition: MPU6050.h:2013
void setXGyroOffsetTC(int8_t offset)
Definition: MPU6050.h:3189
bool getAccelZSelfTest()
Definition: MPU6050.h:728
bool getInterruptMode()
Definition: MPU6050.h:1751
int16_t getAngularRateY()
Definition: MPU6050.h:2291
void setYGyroOffsetTC(int8_t offset)
Definition: MPU6050.h:3200
Motion3 getAngularRate()
void setSlave1FIFOEnabled(bool enabled)
Definition: MPU6050.h:1160
void setIntZeroMotionEnabled(bool enabled)
Definition: MPU6050.h:2003
bool getFSyncInterruptLevel()
Definition: MPU6050.h:1831
void setSlaveAddress(SlaveId slaveId, uint8_t address)
void setYAccelOffset(int16_t offset)
Definition: MPU6050.h:3258
void setWakeFrequency(uint8_t frequency)
Definition: MPU6050.h:2957
void setFullScaleAccelRange(uint8_t range)
Definition: MPU6050.h:765
void setI2CMasterModeEnabled(bool enabled)
Definition: MPU6050.h:2741
bool getSlave1Nack()
Definition: MPU6050.h:1727
void setFIFOByte(uint8_t data)
Definition: MPU6050.h:3136
void setIntDataReadyEnabled(bool enabled)
Definition: MPU6050.h:2065
void setSlave4Address(uint8_t address)
Definition: MPU6050.h:1510
bool getSlave0FIFOEnabled()
Definition: MPU6050.h:1170
uint8_t getGyroZSelfTestFactoryTrim()
bool getSlaveReadWriteTransitionEnabled()
Definition: MPU6050.h:1267
bool getI2CMasterModeEnabled()
Definition: MPU6050.h:2731
bool getYNegMotionDetected()
Definition: MPU6050.h:2442
void setZeroMotionDetectionDuration(uint8_t duration)
Definition: MPU6050.h:1023
void setMotionDetectionDuration(uint8_t duration)
Definition: MPU6050.h:947
uint8_t getOTPBankValid()
Definition: MPU6050.h:3177
void setSlave3FIFOEnabled(bool enabled)
Definition: MPU6050.h:1253
void setXGyroOffset(int16_t offset)
Definition: MPU6050.h:3275
void reset()
Definition: MPU6050.h:2797
bool getIntDMPStatus()
Definition: MPU6050.h:3351
void setClockOutputEnabled(bool enabled)
Definition: MPU6050.h:1917
void setFullScaleGyroRange(uint8_t range)
Definition: MPU6050.h:647
void setXFineGain(int8_t gain)
Definition: MPU6050.h:3222
bool getSlave0Nack()
Definition: MPU6050.h:1738
Motion3 getAcceleration()
void setMotionDetectionCounterDecrement(uint8_t decrement)
Definition: MPU6050.h:2690
uint8_t getFIFOByte()
Definition: MPU6050.h:3127
int16_t getYAccelOffset()
void setExternalFrameSync(uint8_t sync)
Definition: MPU6050.h:566
void setFIFOEnabled(bool enabled)
Definition: MPU6050.h:2716
void resetDMP()
Definition: MPU6050.h:3366
uint8_t getSlave4Register()
Definition: MPU6050.h:1521
MPU6050()
Definition: MPU6050.h:436
void setAuxVDDIOLevel(uint8_t level)
Definition: MPU6050.h:486
void setStandbyYAccelEnabled(bool enabled)
Definition: MPU6050.h:2999
void setRate(uint8_t rate)
Definition: MPU6050.h:523
void setSlave4InterruptEnabled(bool enabled)
Definition: MPU6050.h:1581
bool getIntMotionEnabled()
Definition: MPU6050.h:1973
uint8_t getExternalSensorByte(int position)
Definition: MPU6050.h:2386
void setYFineGain(int8_t gain)
Definition: MPU6050.h:3233
bool getDMPInt1Status()
Definition: MPU6050.h:3336
void setIntFIFOBufferOverflowEnabled(bool enabled)
Definition: MPU6050.h:2023
bool getYGyroFIFOEnabled()
Definition: MPU6050.h:1074
uint8_t getRate()
Definition: MPU6050.h:513
void setIntDMPEnabled(bool enabled)
Definition: MPU6050.h:3314
bool getWakeCycleEnabled()
Definition: MPU6050.h:2834
void setMasterClockSpeed(uint8_t speed)
Definition: MPU6050.h:1317
uint8_t getMotionDetectionDuration()
Definition: MPU6050.h:938
bool getSlave4WriteMode()
Definition: MPU6050.h:1595
void setAccelZSelfTest(bool enabled)
Definition: MPU6050.h:736
uint8_t getClockSource()
Definition: MPU6050.h:2884
bool getAccelXSelfTest()
Definition: MPU6050.h:696
uint8_t getExternalFrameSync()
Definition: MPU6050.h:557
bool getTempFIFOEnabled()
Definition: MPU6050.h:1036
void setExternalShadowDelayEnabled(bool enabled)
Definition: MPU6050.h:2514
int16_t getAngularRateX()
Definition: MPU6050.h:2282
MPU6050(uint8_t address)
Definition: MPU6050.h:446
bool testConnection()
Definition: MPU6050.h:463
void resetI2CMaster()
Definition: MPU6050.h:2769
void setFSyncInterruptEnabled(bool enabled)
Definition: MPU6050.h:1861
void setSlave0FIFOEnabled(bool enabled)
Definition: MPU6050.h:1179
void setZFineGain(int8_t gain)
Definition: MPU6050.h:3244
bool getStandbyXAccelEnabled()
Definition: MPU6050.h:2969
void resetAccelerometerPath()
Definition: MPU6050.h:2569
bool getInterruptLatchClear()
Definition: MPU6050.h:1811
void resetSensors()
Definition: MPU6050.h:2785
uint8_t getSlave4MasterDelay()
Definition: MPU6050.h:1624
void setYGyroOffset(int16_t offset)
Definition: MPU6050.h:3285
uint8_t getSlate4InputByte()
Definition: MPU6050.h:1644
int8_t getXFineGain()
Definition: MPU6050.h:3218
bool getDMPInt4Status()
Definition: MPU6050.h:3324
bool getSlave3FIFOEnabled()
Definition: MPU6050.h:1244
void setInterruptDrive(bool drive)
Definition: MPU6050.h:1781
uint8_t getGyroXSelfTestFactoryTrim()
uint8_t getDLPFMode()
Definition: MPU6050.h:599
void setMemoryBank(uint8_t bank, bool prefetchEnabled=false, bool userBank=false)
void setMotionDetectionThreshold(uint8_t threshold)
Definition: MPU6050.h:916
bool getIntFIFOBufferOverflowStatus()
Definition: MPU6050.h:2125
int16_t getAccelerationX()
Definition: MPU6050.h:2209
void setI2CBypassEnabled(bool enabled)
Definition: MPU6050.h:1891
bool getMultiMasterEnabled()
Definition: MPU6050.h:1201
uint8_t getSlaveRegister(SlaveId slaveId)
bool getStandbyYGyroEnabled()
Definition: MPU6050.h:3049
void setZGyroOffset(int16_t offset)
Definition: MPU6050.h:3296
uint8_t getAccelerometerPowerOnDelay()
Definition: MPU6050.h:2600
uint16_t getExternalSensorWord(int position)
Definition: MPU6050.h:2395
void setDeviceID(uint8_t id)
Definition: MPU6050.h:3168
void resetFIFO()
Definition: MPU6050.h:2759
void setStandbyYGyroEnabled(bool enabled)
Definition: MPU6050.h:3059
bool getIntZeroMotionEnabled()
Definition: MPU6050.h:1993
void setSlaveWriteMode(SlaveId slaveId, bool mode)
uint8_t getMotionDetectionThreshold()
Definition: MPU6050.h:906
void setSlaveDataLength(SlaveId slaveId, uint8_t length)
void getFIFOBytes(uint8_t *data, uint8_t length)
Definition: MPU6050.h:3141
void setDMPEnabled(bool enabled)
Definition: MPU6050.h:3362
void initialize()
void setInterruptLatch(bool latch)
Definition: MPU6050.h:1801
bool getIntMotionStatus()
Definition: MPU6050.h:2101
void setSlave4MasterDelay(uint8_t delay)
Definition: MPU6050.h:1633
void setSlaveOutputByte(SlaveId slaveId, uint8_t data)
void setStandbyXGyroEnabled(bool enabled)
Definition: MPU6050.h:3039
void setAccelXSelfTest(bool enabled)
Definition: MPU6050.h:704
Motion6 getMotion6()
void setStandbyZAccelEnabled(bool enabled)
Definition: MPU6050.h:3019
void setIntEnabled(uint8_t enabled)
Definition: MPU6050.h:1943
uint8_t getFreefallDetectionThreshold()
Definition: MPU6050.h:838
bool getSlaveDelayEnabled(SlaveId slaveId)
int16_t getZAccelOffset()
bool getSlaveEnabled(SlaveId slaveId)
bool getDMPInt2Status()
Definition: MPU6050.h:3332
uint8_t getFullScaleGyroRange()
Definition: MPU6050.h:634
bool getStandbyXGyroEnabled()
Definition: MPU6050.h:3029
bool getLostArbitration()
Definition: MPU6050.h:1683
bool getAccelFIFOEnabled()
Definition: MPU6050.h:1113
void setSlaveEnabled(SlaveId slaveId, bool enabled)
bool getSlaveWordGroupOffset(SlaveId slaveId)
int16_t getAccelerationZ()
Definition: MPU6050.h:2227
int8_t getYFineGain()
Definition: MPU6050.h:3229
void setAccelYSelfTest(bool enabled)
Definition: MPU6050.h:720
uint8_t getZeroMotionDetectionThreshold()
Definition: MPU6050.h:980
bool getYPosMotionDetected()
Definition: MPU6050.h:2451
uint16_t getFIFOCount()
Definition: MPU6050.h:3093
void setStandbyZGyroEnabled(bool enabled)
Definition: MPU6050.h:3079
bool getClockOutputEnabled()
Definition: MPU6050.h:1904
bool getXGyroFIFOEnabled()
Definition: MPU6050.h:1055
bool getStandbyZAccelEnabled()
Definition: MPU6050.h:3009
bool getZGyroFIFOEnabled()
Definition: MPU6050.h:1093
bool getIntDataReadyEnabled()
Definition: MPU6050.h:2055
uint8_t getAccelYSelfTestFactoryTrim()
bool getFIFOEnabled()
Definition: MPU6050.h:2706
uint8_t getGyroYSelfTestFactoryTrim()
bool getIntDataReadyStatus()
Definition: MPU6050.h:2150
void setTempFIFOEnabled(bool enabled)
Definition: MPU6050.h:1045
void setSlave4Register(uint8_t reg)
Definition: MPU6050.h:1530
void setSlaveWordGroupOffset(SlaveId slaveId, bool enabled)
bool getSlave4Nack()
Definition: MPU6050.h:1694
void setDMPConfig2(uint8_t config)
Definition: MPU6050.h:3408
int16_t getZGyroOffset()
Definition: MPU6050.h:3291
bool getI2CBypassEnabled()
Definition: MPU6050.h:1876
int16_t getTemperature()
Definition: MPU6050.h:2238
int8_t getYGyroOffsetTC()
Definition: MPU6050.h:3196
void setIntPLLReadyEnabled(bool enabled)
Definition: MPU6050.h:3306
void setDLPFMode(uint8_t mode)
Definition: MPU6050.h:611
void setSlave4WriteMode(bool mode)
Definition: MPU6050.h:1605
void resetGyroscopePath()
Definition: MPU6050.h:2559
void setIntI2CMasterEnabled(bool enabled)
Definition: MPU6050.h:2044
bool getPassthroughStatus()
Definition: MPU6050.h:1660
bool getSlave2Nack()
Definition: MPU6050.h:1716
void setStandbyXAccelEnabled(bool enabled)
Definition: MPU6050.h:2979
void setZGyroFIFOEnabled(bool enabled)
Definition: MPU6050.h:1102
bool getInterruptDrive()
Definition: MPU6050.h:1771
uint8_t getFreefallDetectionCounterDecrement()
Definition: MPU6050.h:2642
uint8_t getMotionStatus()
Definition: MPU6050.h:2415
uint8_t getAuxVDDIOLevel()
Definition: MPU6050.h:475
void setFreefallDetectionThreshold(uint8_t threshold)
Definition: MPU6050.h:847
void setSlaveWordByteSwap(SlaveId slaveId, bool enabled)
bool getIntZeroMotionStatus()
Definition: MPU6050.h:2113
int8_t getXGyroOffsetTC()
Definition: MPU6050.h:3185
int8_t getZGyroOffsetTC()
Definition: MPU6050.h:3207
void setDHPFMode(uint8_t bandwidth)
Definition: MPU6050.h:815
void setAccelFIFOEnabled(bool enabled)
Definition: MPU6050.h:1122
bool getSlave1FIFOEnabled()
Definition: MPU6050.h:1151
uint32_t getExternalSensorDWord(int position)
Definition: MPU6050.h:2404
int16_t getXAccelOffset()
Provides formatted output to stream.
Definition: Print.h:37
void delay(uint32_t milliseconds)
Pause execution.
Definition: MPU6050.h:3441
T concat(uint8_t bits_15_8, uint8_t bits_7_0)
Definition: MPU6050.h:3442
Definition: MPU6050.h:421
int16_t x
Definition: MPU6050.h:422
size_t printTo(Print &p) const
int16_t z
Definition: MPU6050.h:424
int16_t y
Definition: MPU6050.h:423
Definition: MPU6050.h:428
Motion3 gyro
Definition: MPU6050.h:430
Motion3 accel
Definition: MPU6050.h:429
size_t printTo(Print &p) const