#include "xtensa/xtruntime-frames.h"
#include "gdbstub-cfg.h"
Go to the source code of this file.
◆ ASATTR_GDBFN
#define ASATTR_GDBFN .section .iram.text |
◆ ASATTR_GDBINIT
#define ASATTR_GDBINIT .section .irom0.text |
◆ ATTR_GDBEXTERNFN
#define ATTR_GDBEXTERNFN ICACHE_FLASH_ATTR |
◆ ATTR_GDBINIT
#define ATTR_GDBINIT ICACHE_FLASH_ATTR |
◆ DEBUG_BUILD
◆ GDBSR_A
#define GDBSR_A |
( |
|
n | ) |
GDBSR_a + ((n)*4) |
◆ HOOK_SYSTEM_EXCEPTIONS
#define HOOK_SYSTEM_EXCEPTIONS |
◆ UINT32_T
◆ XCHAL_CP0_SA_ALIGN
#define XCHAL_CP0_SA_ALIGN 1 |
◆ XCHAL_CP0_SA_SIZE
#define XCHAL_CP0_SA_SIZE 0 |
◆ XCHAL_CP1_SA_ALIGN
#define XCHAL_CP1_SA_ALIGN 1 |
◆ XCHAL_CP1_SA_SIZE
#define XCHAL_CP1_SA_SIZE 0 |
◆ XCHAL_CP2_SA_ALIGN
#define XCHAL_CP2_SA_ALIGN 1 |
◆ XCHAL_CP2_SA_SIZE
#define XCHAL_CP2_SA_SIZE 0 |
◆ XCHAL_CP3_SA_ALIGN
#define XCHAL_CP3_SA_ALIGN 1 |
◆ XCHAL_CP3_SA_SIZE
#define XCHAL_CP3_SA_SIZE 0 |
◆ XCHAL_CP4_SA_ALIGN
#define XCHAL_CP4_SA_ALIGN 1 |
◆ XCHAL_CP4_SA_SIZE
#define XCHAL_CP4_SA_SIZE 0 |
◆ XCHAL_CP5_SA_ALIGN
#define XCHAL_CP5_SA_ALIGN 1 |
◆ XCHAL_CP5_SA_SIZE
#define XCHAL_CP5_SA_SIZE 0 |
◆ XCHAL_CP6_SA_ALIGN
#define XCHAL_CP6_SA_ALIGN 1 |
◆ XCHAL_CP6_SA_SIZE
#define XCHAL_CP6_SA_SIZE 0 |
◆ XCHAL_CP7_SA_ALIGN
#define XCHAL_CP7_SA_ALIGN 1 |
◆ XCHAL_CP7_SA_SIZE
#define XCHAL_CP7_SA_SIZE 0 |
◆ STRUCT_AFIELD()
◆ GDBSR_